Switches are widely used in systems. For example, the Serial Rapid Input Output (sRIO) Gen2 Switch may be used to meet wireless infrastructure customer's requirements for WCDMA/LTE Base Stations.
Some of these requirements are challenging, for example, an 18-port Serial Rapid IO (sRIO) Gen2 Switch may be required to achieve very high performance (up to 360 Gbit) with minimum packet latency (<30 ns excluding sRIO protocol stack delay) across Switch Fabric to meet wireless infrastructure customer's requirements for WCDMA/LTE Base Stations.
In order to ensure that only the good packets will be forwarded to their destinations though Serial Rapid IO Gen2 switches, store and forward mode can be used to store a complete packet first then start forwarding if all of the following conditions are met: 1) No error being detected upon packet reception, and 2) No pattern matched while packet filtering is enabled. If a pattern is matched while trace is enabled, the above scheme can guarantee the integrity of packet forwarding but incurs long packet latency while transported through Switch Fabric especially for larger size packets with Buffered Crossbar Switch architecture. This presents a problem as certain applications cannot tolerate long packet latency.
Additionally, current approaches require the same number of bits for a discard as the width of a switch, for example, an 18-port Serial Rapid Input Output (sRIO) Gen2 Switch requires 18 bits. This presents a problem as many memory buffers are needed for buffered crossbar switch and more memory bits required for storing discard information increases product cost significantly.